Physical Design is a process of transforming a circuit description into physical layout which describes the position of cells and routes for the interconnections between them. It is the result of a synthesized netlist that has been placed and routed. The design flow deals with various steps involved such as follows: Synthesized netlist ⇓ Partitioning ⇓ Sanity checks ⇓ Floorplan ⇓ Power plan ⇓ Placement ⇓ Clock Tree Structure (CTS) ⇓ Routing ⇓ Signoff Sanity checks has to be performed before every stage in order to check whether our design is meeting the requirements for the next stage (or) whether its properly designed. Basically, a code(program) is developed that explains us the RTL characteristics of the chip to be designed. That will be done by the front end engineers(RTL design team). The developed code is then compiled and as a result, a synthesized netlist is obtained. It contains the gate level model for the respective RTL code. .def is the output file at each s...
Temperature affects the performance of the design both when its turned ON or OFF. When the device is in OFF state , minority charge carrier concentration (conc.) increases with the increase in temperature. (*As we know, temperature affects the minority charge carrier concentration but not majority charge carriers.) The leakage current increases with the incr. in minority charge carriers which inturn incr. the temp. and it goes on.. (*1 ο C ↑ → 7% I ο ↑) Temp.↑ → Minority carrier conc.↑ → Leakage current↑ → Temp↑ It leads to Static Power Dissipation and at some stage, the device may break. When the device is in ON state , mobility( µ ) and threshold voltage( V t ) will get affected by temperature. Before going through this, we must recall the relation between µ ...
