CrossTalk

Switching of a signal in one net can interfere the signal in neighboring net due to coupling capacitance formed between the metals. This is referred as "CrossTalk".

The affecting net is called as "Aggressor" whereas the net being affected is called as "Victim".

 

There are 2 types of effects caused by crosstalk.

Crosstalk Noise : because of glitch (steady victim)

Crosstalk Delay : change in timing of the victim (switching victim)

Crosstalk Noise :

 

This is because of glitch formed on victim.

Here aggressor is switching signal whereas victim is a steady signal (either constant 1 or 0).

The magnitude of the glitch depends on

• coupling capacitance between the aggressor and victim
• slew of the aggressor net

If the magnitude of the glitch is large enough, then the fanout cell gets a different logic value that results in functionality error.

 

Types of Glitches :

When victim is at steady low

• Rise glitch : when aggressor switches from 0 to 1
• Undershoot glitch : when aggressor switches from 1 to 0 (i.e., < logic 0).

When victim is at steady high

• Fall glitch : when aggressor switches from 1 to 0.
• Overshoot glitch : when aggressor switches from 0 to 1 (i.e., > logic 1).

The propagation of glitch through the cell, depends on the glitch attributes such as

• glitch height
• glitch width
• fanout load

DC noise analysis examines the glitch magnitude whereas the the width of glitch and effect of fanout load were examined by AC analysis.

 

DC analysis :

DC noise limits

Safe and Hazardous glitches

The glitch voltages which are in between Vih_min and Vdd and Vil_max and Vss are considered as "Safe glitches" whereas the voltages in between Vil_max and Vih_min are considered as hazardous ones (which pushes the flop connected to it into metastability state causing the functionality failures).

AC analysis :

The light shaded region represents the good (or) acceptable glitches and the dark shaded region are hazardous ones.

 

When comes to fanout load, the figure shows everything.

As the load of the cell increases, the effect of the glitch reduces.

Noise accumulation with multiple aggressors:
This analysis includes determining whether the multiple aggressors can switch concurrently. STA obtains this information from timing windows of aggressor nets. Then based on concurrent switching of aggressor nets in each timing bin, the worst delay is estimated and considered in timing analysis.

For example,

Here glitch contribution of each aggressor is as shown. So, the delay of timing

bin 1 : A1 + A2 = 0.11 + 0.10 = 0.21

bin 2 : A1 + A2 + A3 = 0.11 + 0.10 + 0.09 = 0.30

bin 3 : A1 + A3 = 0.11 + 0.09 = 0.20

bin 4 : A3 + A4 = 0.09 + 0.23 = 0.32

The worst delay obtained is 0.32 which is considered for timing analysis. If the analysis is made without considering timing windows, then tool considers all aggressors contributions for timing analysis. This makes timing more pessimistic.

(*If the aggressor is switching in opposite direction, then tool will subtract the contribution while performing timing analysis.)

 

Crosstalk Delay :

This is because of effect of high switching net on low switching net. It effects the delay of the victim net.

The timing impact of an aggressor net on victim net depends on

• amount of coupling capacitance
• slew rates of the signal transitions
• switching directions
• combination of effects from multiple aggressor nets on a single victim net.

Types of delays :

Based on the switching directions of aggressor and victim.

• Positive delay
• Negative delay 

Positive delay :

• Aggressor and victim are switching in the different direction.
• Hence, the delay on the victim increases.

Negative delay :

• Aggressor and victim are switching in the same direction.
• Hence, the delay on the victim decreases.

Types of delay contributions computed for each cell and interconnect in the design :

• Positive rise delay (rise edge moves forward in time)
• Negative rise delay (rise edge moves backward in time)
• Positive fall delay (fall edge moves forward in time)
• Negative rise delay (fall edge moves backward in time) 

Aggressor victim timing correlation :

Crosstalk effects the delay of victim net if aggressor and victim switches concurrently. For multiple aggressor analysis, it is same as that of glitch analysis. i.e., based on timing windows.

 

For example,

The delays in timing bins are as follows.

bin 1 : A1 + A2 = 0.12 + 0.14 = 0.26

bin 2 : A1 = 0.12

bin 3 : A3 = 0.23

The worst delay here, 0.26 shows impact on the timing of victim net.

 

Timing analysis with crosstalk :

 

Tool always considers the worst case delays for the data path and clock paths.

 

Setup calculation :

As mentioned in the previous post on STA calculation, tool considers the min. delays for RT and max. delays for AT.

We just discussed that positive crosstalk increases delay and negative crosstalk reduces the delay.

Setup slack = RT_min - AT_max

Launch clock path and data path sees positive crosstalk delays and Capture clock path sees negative crosstalk delays.

Hold calculation :

As mentioned in the previous post on STA calculation, tool considers the max. delays for RT and min. delays for AT.

Hold slack = AT_min - RT_max

Launch clock path and data path sees negative crosstalk delays and Capture clock path sees positive crosstalk delays.

For common path, the contributions of crosstalk is as mentioned for setup where it sees the different delays for AT and RT because the setup check is done at the next edge. That means, capturing is done at next edge.

But for hold analysis, no delays are considered for common path because the hold check is done at same edge of launch and capture clocks.

Reduction Techniques : 

1.     Adding Non-Default Rule (NDR) - increasing spacing between the nets.

2.     Shielding - routing with ground lines around the aggressor so that avoids the formation of coupling capacitance with victim net.

3.     By upsizing the driver of victim net (or) downsizing the driver of aggressor net.

4.     Buffering - splitting the long nets that inturn reduces the capacitance. 

Source : ICC user guide and J. Bhaskar